Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
Patent
1990-06-01
1991-09-10
Miller, Stanley D.
Electrical transmission or interconnection systems
Nonlinear reactor systems
Parametrons
307480, 307443, 3072471, H03K 3286, H03K 3289
Patent
active
050476580
ABSTRACT:
A data synchronizer that operates at two to four times greater clock and data rates than previous data synchronizers. By using a positive feedback, self latching gate as the first memory element, rather than a cross-coupled device such as a flip-flop, such rates are attained without inducing metastable oscillation. The positive feedback, self latching gate is far less prone to metastable oscillation since it does not have two cross-coupled devices fighting each other to resolve the proper response to an input. Instead, the self latching gate latches up if a data HIGH is present during a clock HIGH, and remains LOW otherwise. External circuitry resets the self latching gate to the LOW state before the start of each clock HIGH cycle to remove any previous latched state. The self latching gate output is then synchronously sampled by a type D flip-flop to provide a completely synchronized data output.
REFERENCES:
patent: Re32945 (1989-06-01), Smithson
patent: 3091737 (1963-05-01), Tellerman et al.
patent: 3471790 (1969-10-01), Kaps
patent: 3751683 (1973-08-01), Drost
patent: 4021686 (1977-05-01), Zuk
patent: 4093878 (1978-06-01), Paschal et al.
patent: 4417155 (1983-11-01), Aizawa
patent: 4479065 (1984-10-01), Aizawa
patent: 4575644 (1986-03-01), Leslie
patent: 4578599 (1986-03-01), Birch et al.
patent: 4591737 (1986-05-01), Campbell
patent: 4797838 (1989-01-01), Nelson et al.
patent: 4800296 (1989-01-01), Ovens et al.
patent: 4820939 (1989-04-01), Sowell et al.
patent: 4839541 (1989-06-01), Gal et al.
patent: 4851710 (1989-07-01), Grivna
patent: 4963772 (1990-10-01), Dike
E. N. Hayes and M. A. Orr, "Synchronization of LSSD System Clocks to Asynchronous Signals", 01/1985, pp. 4934-4937.
T. S. Stafford "Circuit with Asynchronous Control and Synchronous Integrated Output" 11/1960, pp. 29-30.
Petty William K.
Shrock Eugene L.
Hawk Jr. Wilbert
Jewett Stephen F.
Miller Stanley D.
NCR Corporation
Penrod Jack R.
LandOfFree
High frequency asynchronous data synchronizer does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with High frequency asynchronous data synchronizer, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and High frequency asynchronous data synchronizer will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-542125