Method for forming a connection device in a semiconductor device

Details Method for forming a connection device in a semiconductor device Method for forming a connection device in a semiconductor device

1990-05-07

1992-01-14

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437189, 437978, 148DIG141, H01L 2172, H01L 21441

Patent

active

050810600

ABSTRACT:
A method for electrically connecting a bit line to a source electrode of the MOSFETs in a semiconductor device is disclosed and which comprises arranging a gate electrode mask to form gate electrodes which are spaced apart and formed on respective gate oxide layers such that a contact mask which when positioned within the space between the gate electrodes provides a gap, for mask misalignment and critical dimension loss during the contact mask patterning process, of less than about 0.3 micrometer, separating each gate electrode from the respective proximate side of the contact mask. A contact hole having a side wall is formed to expose the source electrode by utilizing the contact mask and etching a portion of the etch stop layer and a portion of the insulating layer above the source electrode by the contact mask patterning process. A second insulating layer is deposited over the entire surface of the device. The etch stop layer and the second insulating layer are removed from the surface of the device except for a portion of the second insulating layer deposited on the sidewall of the contact hole to provide an insulating film spacer on the sidewall of the contact hole to ensure electrical isolation of the gate electrode proximate the sidewall of the contact hole. A conductive layer for a bit line is deposited on the entire surface of the device to electrically connect the source electrode to the bit line.

REFERENCES:
patent: 4114256 (1978-09-01), Thibault et al.
patent: 4686000 (1987-08-01), Heath
patent: 4852062 (1989-07-01), Baker et al.

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