Method of making vertical current flow field effect transistor

Details Method of making vertical current flow field effect transistor Method of making vertical current flow field effect transistor

1992-11-18

1996-11-19

Fourson, George

Fishing, trapping, and vermin destroying

437 40, 437979, H01L 21336

Patent

active

055762450

ABSTRACT:
A transistor constructed in accordance with our invention includes an N+ substrate, an N- region formed on the N+ substrate, a P- body region formed on the N- region, and an N+ source region formed on the P- body region. A vertical groove extends through the N+, P- and N- regions, and an insulating layer is formed on the groove walls. A polysilicon gate is formed inside the groove. Of importance, the portion of the insulating layer between the polysilicon and the N+ region and the insulating layer between the polysilicon and the N+ substrate is thicker than the portion of the insulating layer between the polysilicon gate and the P- body region. Because of the enhanced thickness of the portions of the .insulating layer between the gate and N+ substrate, the transistor constructed in accordance with our invention is less susceptible to premature field induced breakdown.

REFERENCES:
patent: 4070690 (1978-01-01), Wickstrom
patent: 4242690 (1980-12-01), Temple
patent: 4252579 (1981-02-01), Ho et al.
patent: 4259683 (1981-03-01), Adler et al.
patent: 4374389 (1983-02-01), Temple
patent: 4398339 (1983-08-01), Blanchard et al.
patent: 4503449 (1985-03-01), David et al.
patent: 4510016 (1985-04-01), Chi et al.
patent: 4543706 (1985-10-01), Bencuya et al.
patent: 4566172 (1986-01-01), Bencuya et al.
patent: 4612465 (1986-08-01), Schutten et al.
patent: 4700460 (1987-10-01), Dolny et al.
patent: 4717687 (1988-01-01), Verma
patent: 4767722 (1988-08-01), Blanchard
patent: 4788158 (1988-11-01), Chatterjee
patent: 4797373 (1989-01-01), Machi et al.
patent: 4814839 (1989-03-01), Nishizawa et al.
patent: 4824793 (1989-04-01), Richardson et al.
patent: 4921815 (1990-05-01), Miyazawa
patent: 4941026 (1990-01-01), Temple
patent: 5021355 (1991-06-01), Dhong et al.
C. P. Ho et al., "Si/Si02 Interface Oxidation Kinetics; a Physical Model for the Influence of High Substrate Doping Levels", J. Electrochem. Soc., Sep., 1979, pp. 1523-1530.

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