Fishing – trapping – and vermin destroying
Patent
1995-06-21
1996-11-19
Wilczewski, Mary
Fishing, trapping, and vermin destroying
437 52, H01L 218247
Patent
active
055762336
ABSTRACT:
A method for making an EEPROM (10) in a semiconductor substrate (40) and EEPROM made according to the method includes forming a gate dielectric (38), such as oxide, nitride, multilayer dielectric, or the like, on a surface of the substrate (40) and forming a polysilicon floating gate (19) on the gate dielectric (38). A control gate (25) is formed at least partially overlying the floating gate (19), and a thermal oxide layer (56) is formed on the floating gate (19) in regions that are not covered by the control gate. Thus, the thermal oxide layer (56) encases any regions of the floating gate (19) uncovered by the control gate (25) and serves as a high quality dielectric to isolate the floating gate (19) from charge loss and other deleterious effects. Then, source and drain regions (21,27) are formed in the substrate (40).
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Erdeljac John P.
Hutter Louis N.
Booth Richard A.
Brady III W. James
Donaldson Richard L.
Texas Instruments Incorporated
Wilczewski Mary
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