Process for fabricating a recessed gate MOS device

Details Process for fabricating a recessed gate MOS device Process for fabricating a recessed gate MOS device

1994-11-02

1996-11-19

Wilczewski, Mary

Fishing, trapping, and vermin destroying

437 40, 437 44, 437200, 437203, 148DIG105, H01L 21265, H01L 2144, H01L 2148

Patent

active

055762271

ABSTRACT:
A process for fabricating a MOS device having a recessed gate on a silicon substrate. Source/drain regions are formed by implanting impurities of a first conductivity type into a silicon substrate. A trench is formed in the silicon substrate, the trench being separated from the source/drain regions by side wall spacers on side walls of the trench. The source/drain regions extend to areas underlying the sidewall spacers. An anti-punchthrough region is formed by implanting impurities of a second conductivity type into a portion of the silicon substrate underlying the trench. A gate layer is formed within the trench, the gate layer being separated from the anti-punchthrough region by a gate oxide layer.

REFERENCES:
patent: 5270257 (1993-12-01), Shin
patent: 5300447 (1994-04-01), Anderson
patent: 5371024 (1994-12-01), Hieda et al.

Affiliated with

Also associated with

Rating

Process for fabricating a recessed gate MOS device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Process for fabricating a recessed gate MOS device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Process for fabricating a recessed gate MOS device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-540498