Method of manufacturing a semiconductor integrated circuit devic

Details Method of manufacturing a semiconductor integrated circuit devic Method of manufacturing a semiconductor integrated circuit devic

1996-07-01

1998-05-05

Bowers, Jr., Charles L.

Semiconductor device manufacturing: process

Making passive device

Stacked capacitor

438759, 438760, 438778, 438791, H01L 2120

Patent

active

057473757

ABSTRACT:
A method of manufacturing a semiconductor integrated circuit device employs a new reflowing process of an insulating film having contact holes and openings therethrough. A good step coverage of a wiring electrode at the contact holes of the insulating film can be obtained with reduced thermal cycles in the manufacturing of integrated circuit devices, and also with a reduced heat treatment temperature of the reflowing process. The process includes a step of depositing a silicon nitride film on the insulating film and on the contact holes by chemical vapor deposition at a temperature between 700.degree. C. and 800.degree. C. so as to deform edges of the contact holes in the insulating film to be rounded and smooth.

REFERENCES:
patent: 4638400 (1987-01-01), Brown et al.
patent: 4978419 (1990-12-01), Nanda et al.
patent: 5083184 (1992-01-01), Eguchi
patent: 5554940 (1996-09-01), Hubacher
Brown et al., "Advanced Analog CMOS Technology" International Electron Devices Meeting Technical Digest, pp. 260-263, 1985.

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