Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1988-11-02

1990-03-06

Fears, Terrell W.

Static information storage and retrieval

Floating gate

Particular biasing

365182, 357 235, G11C 1140, G11C 1300

Patent

active

049071980

ABSTRACT:
An EEPROM formed of three-layer polysilicon is provided. A floating gate is at a second level and a portion thereof is at a first level. A first control gate and a select gate are formed spaced apart from each other at the first level and a portion of the second floating gate extends between them for formation of a tunnel region. A second control gate which is kept at the same potential as the first control gate exist at a third level. In this EEPROM, electrons are drawn from the floating gate by applying a high voltage to the select gate.

REFERENCES:
patent: 4783766 (1988-11-01), Samachisa et al.
patent: 4847667 (1989-07-01), Mori

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