Fishing – trapping – and vermin destroying
Patent
1991-09-04
1993-04-06
Thomas, Tom
Fishing, trapping, and vermin destroying
437 35, 437 47, 437 48, 437 60, 437919, H01L 2170
Patent
active
052003531
ABSTRACT:
A semiconductor memory device comprises a semiconductor substrate having a trench, first polysilicon serving as a charge storage region formed through an insulating film in an inner portion of the trench, and second polysilicon serving as a capacitor electrode formed through an insulating film inside of the first polysilicon. An impurity contact region connects the charge storage region to a transfer gate transistor in the surface adjacent the trench so that information charges are transferred. A method for manufacturing such a semiconductor memory device includes forming a trench in the major surface of the semiconductor substrate and forming a first insulating layer in an inner portion of the trench. On at least one sidewall of the trench, the first insulating layer begins at a distance below the upper end of the trench. The impurity contact region is formed by obliquely implanting ions in the region of the sidewall above the first insulating layer and in a portion of the major surface of the substrate. The first polysilicon layer, which serves as the charge storage region of the capacitor, is formed in the trench in contact with the impurity contact region. The insulating film and the second polysilicon electrode of the capacitor are then formed on the first polysilicon layer.
REFERENCES:
patent: 3940747 (1976-02-01), Kuo et al.
patent: 4415371 (1983-11-01), Soclof
patent: 4466178 (1984-08-01), Soclof
patent: 4534824 (1985-08-01), Chen
patent: 4653177 (1987-03-01), Lebowitz et al.
patent: 4734384 (1988-03-01), Tsuchiya
patent: 4786954 (1988-11-01), Morie et al.
patent: 4830978 (1989-03-01), Teng et al.
patent: 4921816 (1990-03-01), Ino
M. Taguchi, et al., "Dielectrically Encapsulated Trench Capacitor Cell", IEDM 86. (1986).
S. Nakajima, et al., "An Isolation-Merged Vertical Capacitor Cell for Large Capacity DRAM", IEDM 84 (1984).
P. Chatterjee, et al., "Trench and Compact Structures for dRAMS", International Electron Device Meeting (1986).
Mitsubishi Denki & Kabushiki Kaisha
Thomas Tom
LandOfFree
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