System for generating mask pattern for vector data processor

Details System for generating mask pattern for vector data processor System for generating mask pattern for vector data processor

1986-09-19

1989-06-20

Shaw, Gareth D.

Boots, shoes, and leggings

G06F 1516

Patent

active

048414387

ABSTRACT:
A system for generating a mask pattern for a vector data processor is described having at least a mask register and a vector register in which, when the value of the mask register is "1", a calculation is executed for the corresponding element of the vector register, and when the value of the mask register is "0", a calculation is not executed, in accordance with the so-called calculational mask function. The system includes: a designation unit for designating sequential i elements of "0" or "1" from the head element of the mask register, and the subsequent sequential j elements of "1" or "0"; a control unit for rendering the i elements to be "0" or "1", the j elements to be "1" or "0", and the remaining entire elements to be all "0's" or all 1's, when "i" plus "j" is smaller than a vector length which is the object of calculation of a vector data operand for use in a vector instruction; and a desired mask pattern of "0" or "1" is able to be generated in the mask register.

REFERENCES:
patent: 4621324 (1986-11-01), Ushiro et al.
patent: 4630192 (1986-12-01), Wassel et al.
patent: 4680730 (1987-07-01), Omoda et al.

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