Fast accessible dynamic type semiconductor memory device

Static information storage and retrieval – Addressing – Plural blocks or banks

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Details

395405, G11C 800

Patent

active

060288108

ABSTRACT:
Respective ones of a plurality of memory array blocks are rendered drivable independently of each other under control of an array activation control circuit. When data is read from one array block under control of the array activation control circuit, the data can be transferred to another array block by selecting and coupling a column in the other array block to a global I/O bus.

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