Nonvolatile semiconductor memory device with a double gate struc

Details Nonvolatile semiconductor memory device with a double gate struc Nonvolatile semiconductor memory device with a double gate struc

1988-04-07

1990-05-29

Hecker, Stuart N.

Static information storage and retrieval

Floating gate

Particular biasing

365182, 365184, 357 235, G11C 700, G11C 1140, H01L 2978

Patent

active

049301055

ABSTRACT:
A memory cell of a nonvolatile semiconductor memory device includes a P conductive type semiconductor substrate, first and second diffusion layers of an N conductivity type, formed in the substrate, a channel region formed in the surface region of the substrate, and which is located between the first and second diffusion layers, a floating gate electrode formed on the channel region, and a control gate electrode formed on the floating gate electrode. The memory cell further includes a third diffusion layer of the N conductivity type, and formed between the first layer and the channel region, the third layer having an impurity concentration lower than that of the first layer.

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patent: 4788663 (1988-11-01), Tanaka et al.
patent: 4794565 (1988-12-01), Wu et al.
patent: 4812898 (1989-03-01), Sumihiro
patent: 4870615 (1989-09-01), Marayama

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