Semiconductor memory device

Static information storage and retrieval – Format or disposition of elements

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365 63, 36518901, G11C 502

Patent

active

053315880

ABSTRACT:
Out of a plurality of digit lines consisting of first layer aluminum wirings that are connected respectively to a plurality of memory cells forming a memory cell array region, and sense amplifiers that have the digit lines selected by Y selector circuits as the inputs are arranged in the direction of the digit lines of the memory cell array region. At least a part of the wirings between the plurality of the digit lines and the sense amplifiers are disposed as second layer aluminum wirings on the memory cell array region. By so arranging it is possible to provide sophisticated sense amplifiers in a semiconductor memory device which has a large number of output bits and yet a high speed operation is required for it.

REFERENCES:
patent: 4710789 (1987-12-01), Furutani et al.
patent: 4896294 (1990-01-01), Shimizu et al.

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