Non-volatile semiconductor memory device and method of the manuf

Details Non-volatile semiconductor memory device and method of the manuf Non-volatile semiconductor memory device and method of the manuf

1988-08-23

1990-05-29

Carroll, J.

357 49, 357 54, 357 55, 357 59, 357 71, H01L 2978, H01L 2934, H01L 2906, H01L 2348

Patent

active

049299883

ABSTRACT:
A groove is formed in a P well region to extend in a predetermined direction, and the groove is selectively filled with silicon dioxide layers so that the groove is separated into a plurality of groove portions. On each of opposed side walls of the groove portion along the direction of extension of the groove sequentially formed are a first gate insulating layer and a polysilicon layer serving as a floating gate electrode. Further, a second gate insulating layer and a polysilicon layer serving as a control gate electrode are sequentially formed on the polysilicon layer. N-type diffusion regions serving as source regions of MOS transistors are formed in the surface of the P well region, and further an N-type diffusion region serving as drain regions of the MOS transistors is formed in a surface region of the P well region that is located at the bottom of the groove portion.

REFERENCES:
patent: 4698900 (1987-10-01), Esquivel
patent: 4786953 (1988-11-01), Morie et al.

Affiliated with

Also associated with

Rating

Non-volatile semiconductor memory device and method of the manuf does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Non-volatile semiconductor memory device and method of the manuf, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Non-volatile semiconductor memory device and method of the manuf will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-524380