Phase-locked loop circuit

Details Phase-locked loop circuit Phase-locked loop circuit

1988-12-22

1990-05-29

Mis, David

Oscillators

Automatic frequency stabilization using a phase or frequency...

Afc with logic elements

331 15, 331 17, 331 25, 360 27, 369 47, H03L 708, G11B 502

Patent

active

049299174

ABSTRACT:
A phase-locked loop circuit (PLL) to which a phase-synchronization signal is intermittently supplied, both of the natural angular frequency of the PLL and the damping factor of the same are so determined as to prevent a phase difference produced at the next sampling point from exceeding the linear property range of a phase comparator even when the extraneous electrical disturbance enters the PLL. In addition, when the level of a clock control signal supplied to a variable frequency oscillator which varies the clock signal of the PLL in phase and frequency exceeds a predetermined value, the level of the clock control signal is limited to the predetermined value. As a result, it is possible to prevent the output signal of the phase difference from having any discontinuity.

REFERENCES:
patent: 4596963 (1986-06-01), Lawton et al.
patent: 4617527 (1986-10-01), Naitoh

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