Method of making non-volatile split gate EPROM memory cell and s

Details Method of making non-volatile split gate EPROM memory cell and s Method of making non-volatile split gate EPROM memory cell and s

1993-06-18

1994-07-19

Thomas, Tom

Fishing, trapping, and vermin destroying

437 43, 437 48, H01L 2170

Patent

active

053309383

ABSTRACT:
The cell comprises a substrate with diffusions of source and drain separated by a channel area a floating gate superimposed over a first part of said channel area and a control gate formed by a first and a second polysilicon strip, respectively, a cell gate oxide between said floating gate and said first part of the channel area, a transistor gate oxide between said control gate and a second part of the channel area, an interpoly oxide between said floating gate and said control gate and a layer of dielectric filler. By means of a process which provides for self-aligned etchings of layers of polysilicon and of oxides there is obtained a floating gate and a control gate self-aligned with one another and with the diffusions of source and drain, as well as with the first oxide.

REFERENCES:
patent: 4300212 (1981-03-01), Simko
patent: 5015601 (1991-05-01), Yoshikawa
patent: 5081056 (1992-01-01), Mazzali et al.

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