Complementary semiconductor device having a double well

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357 48, 357 50, 357 236, 357 45, H01L 2978

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049070584

ABSTRACT:
A CMOSLSI is disclosed which includes a semiconductor body, a first N-well region formed in the semiconductor body, a second N-well region, a greater part of which is formed in the first N-well region, a first P-well region formed in the semi-conductor body, a second P-well region, a greater part of which is formed in the first P-well region, a P-channel MOS transistor formed in the second N-well region, and an N-channel MOS transistor formed in the second P-well region, to reduce the distance between the P-channel MOS transistor and the N-channel MOS transistor, thereby increasing the packing density of the CMOSLSI.

REFERENCES:
patent: 4578128 (1986-03-01), Mundt
patent: 4684971 (1987-08-01), Payne
patent: 4717686 (1988-01-01), Jacobs

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