Method for simulating impurity diffusion in semiconductor with o

Details Method for simulating impurity diffusion in semiconductor with o Method for simulating impurity diffusion in semiconductor with o

1997-08-21

1999-12-21

Stamber, Eric W.

Boots, shoes, and leggings

39550034, 36446828, G06F 9455

Patent

active

060060263

ABSTRACT:
A method for simulating a concentration of impurities within a semiconductor device while the semiconductor device is being oxidized includes setting a transition region in a part of the semiconductor device which is oxidized for a unit time period, and then calculating the concentration of impurities within the transition region by solving a diffusion equation using an impurity diffusion coefficient peculiar to the transition region, thus obtaining a redistribution of impurities within the transition region.

REFERENCES:
patent: 5502643 (1996-03-01), Fujinaga
patent: 5737250 (1998-04-01), Sawahata
patent: 5784302 (1998-07-01), Kumashiro
patent: 5819073 (1998-10-01), Nakamura
M. Hane and K. Hane, Finite and Boundary Element Approach to Process Simulation with Conjugate Gradient-Based Method, IEEE Proceedings of the 5th Int'l Conf. on the Numerical Analysis of Semiconductor Devices and Integrated Circuits, 1987, pp. 219-224.
M. Kump and R. Dutton, The Efficient Simulation of Coupled Point Defect and Impurity Diffusion, IEEE Transactions on Computer-Aided Design, vol. 7, No. 2, Feb. 1988, pp. 191-204.
S. Odanaka et al., SMART-P: Rigorous Three-Dimensional Process Simulator on a Supercomputer, IEEE Transactions on Computer-Aided Design, vol. 7, No. 6, Jun. 1988, pp. 675-683.
B. Mulvaney et al., PEPPER--A Process Simuator for VLSI, IEEE Transactions on Computer-Aided Design vol. 8, No. 4, Apr. 1989, pp. 336-349.
E. Rorris et al., A New Approach to the Simulation of the Coupled Point Defects and Impurity Diffusion, IEEE Transactions on Computer-Aided Design, vol. 9, No. 10, Oct. 1990, pp. 1113-1122.
H. Sakamoto and S. Kumashiro, A New Diffusion Algorithm during Oxidation which can Handle both Phosphorus Pile-up and Boron Segregation at Si-SiO2 Interface, 1997 Int'l Conf. on Simulation of Semiconductor Processes and Devices, SISPAD '97, IEEE, pp. 81-84.

Affiliated with

Also associated with

Rating

Method for simulating impurity diffusion in semiconductor with o does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for simulating impurity diffusion in semiconductor with o, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for simulating impurity diffusion in semiconductor with o will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-514090