Semiconductor device having a semiconductor substrate with reduc

Details Semiconductor device having a semiconductor substrate with reduc Semiconductor device having a semiconductor substrate with reduc

1992-07-17

1994-04-05

Hille, Rolf

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

257296, 257659, 257920, H01L 2348, H01L 2946

Patent

active

053008146

ABSTRACT:
A semiconductor device comprising a semiconductor substrate, a plurality of memory cell regions each having a plurality of memory cells disposed on the semiconductor substrate, a word line formed in a first level above the semiconductor substrate, a bit line formed in a second level above the first level, and a backing line having a lower resistance than the word line and formed in a third level above the second level. A dummy bit line is formed in the second level outside the memory cell region so as to reduce the step formed at the periphery of the memory cell region. The dummy bit line is also used to interconnect the word line and the backing line so that an electrical connection therebetween is stabilized.

REFERENCES:
patent: 4679171 (1987-07-01), Logwood et al.
patent: 5110762 (1992-05-01), Nakahara et al.

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