Parallel serial controller

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G06F 304

Patent

active

044970412

ABSTRACT:
A computer-peripheral interface includes a latch to receive parallel data from a peripheral, such as a cash register, with a hardware mask to reject irrelevant data, a simple FIFO memory and a parallel-serial converter for transmission to a controlling computer. These devices are controlled by a combination of five one-shots for timing, and a D flip-flop and gates. The problem of controlling a variety of peripherals, such as cash registers, by a central computer without also incorporating microprocessors or equivalent complicated devices in each peripheral yet still providing sufficient data handling capacity is solved.

REFERENCES:
patent: 3631403 (1971-12-01), Asbo et al.
patent: 3699532 (1972-10-01), Schaffer et al.
patent: 3921148 (1975-11-01), Ophir et al.
patent: 4058680 (1977-11-01), Curtis
patent: 4082922 (1978-04-01), Chu

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