Multiplex communications – Wide area network – Packet switching
Patent
1993-11-19
1994-08-23
Gossage, Glenn
Multiplex communications
Wide area network
Packet switching
395250, 370 82, 370 851, 370102, 365 95, G06F 1300, G06F 506, H04J 306, G11C 700
Patent
active
053414926
ABSTRACT:
A frame conversion circuit for changing data with different speeds to the same speed to thereby obtain data of the same frame length is provided with an initial value inputting circuit for writing an arbitrary initial value into a memory at each address each time data is sequentially read out according to a read address signal from the memory. Therefore, no error is produced in a sign bit check and the possibility of occurrence of erroneous synchronization is minimized. The initial value inputting circuit may be implemented using a plurality of pull-up resistors connected to a data bus.
REFERENCES:
patent: 4186379 (1980-01-01), Knoblock et al.
patent: 4873684 (1989-10-01), Kobayashi et al.
Fujitsu Limited
Gossage Glenn
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