Automatically variable memory interleaving system

Details Automatically variable memory interleaving system Automatically variable memory interleaving system

1988-10-27

1994-08-23

Kulik, Paul V.

Boots, shoes, and leggings

395400, 364DIG1, 364245, 364246, 3642464, 364254, 3642544, 3642384, G06F 1206

Patent

active

053414861

ABSTRACT:
An automatically variable memory interleaving system which provides different interleaving factors for particular groups of memory modules dependent upon the number of operable modules present in the system. In a particular preferred embodiment, the interleaving factor is determined for the module containing the address corresponding to the applied memory address, and this interleaving factor is then used to select particular bits of the applied memory address for determining the module to be enabled and the module address.

REFERENCES:
patent: 3806881 (1974-04-01), Miwa et al.
patent: 3958222 (1976-05-01), Messina et al.
patent: 4280176 (1981-07-01), Tan
Gustafson et al., "Memory-Mapped VLSI and Dynamic Interleave Improve Performance," Computer Design, Nov. 1, 1985.
M. Lehman, "Variable Memory Structure," IBM Technical Disclosure Bulletin, vol. 9 No. 9 Feb. 1967, pp. 1180-1181.

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