Nonvolatile semiconductor storage system

Details Nonvolatile semiconductor storage system Nonvolatile semiconductor storage system

1994-01-27

1995-07-11

Popek, Joseph A.

Static information storage and retrieval

Floating gate

Particular biasing

365218, 365900, 36518901, 36518909, G11C 700

Patent

active

054327385

ABSTRACT:
An object is to realize a nonvolatile semiconductor storage system which can prevent a false reading operation due to the overerasure, improve the lower limit of operation margin, lower the supply voltage and form a signal power supply. When each of memory transistors 1-4 is subjected to the reading operation, a negative voltage is applied to a non-selected word line WL2 from X-decoder 5 and negative voltage generating circuit 8 to prevent the false reading operation due to the overerasure. When each of the memory transistors 1-4 is subjected to the erasing operation, a negative voltage is applied to word lines WL1 and WL2 to reduce a high voltage to be applied to a source line SL. This can realize low voltage operation and single voltage power supply operation. By applying the negative voltage to the substrate of a memory transistor when it is subjected to the reading operation, the false reading operation due to the overerasure can be prevented.

REFERENCES:
patent: 5022002 (1991-06-01), Iwahashi
patent: 5031149 (1991-07-01), Matsumoto et al.
patent: 5253202 (1993-10-01), Bronner et al.
patent: 5297104 (1994-03-01), Nakashima
patent: 5341329 (1994-08-01), Takebuchi

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