Method for generating a test to detect differences between integ

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371 23, 371 251, 371 681, G01R 3128, G06G 748

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053413148

ABSTRACT:
A test (i.e., a set of test vectors) for differentiating between two different integrated circuit versions (12,14) is established by first modeling the circuits in a simulated system such that: (a) the corresponding inputs of the circuits are coupled in parallel, (b) the corresponding outputs of the circuits are exclusively OR'd by a separate one of a plurality of exclusive OR gates (18.sub.1,18.sub.2,18.sub.3 . . . 18.sub.m), and (c) the outputs of the exclusive OR gates are OR'd by an OR gate (20). Thereafter, a set of test vectors is generated, using conventional techniques, such that the vectors, when input to the different-version integrated circuits, cause a predetermined logic level signal to the OR gate (20).

REFERENCES:
patent: 4122995 (1978-10-01), Franke
patent: 4426699 (1984-01-01), Tanaka et al.
patent: 4773028 (1988-09-01), Tallman
patent: 4837765 (1989-06-01), Suzuki
patent: 5128944 (1992-07-01), Flaherty et al.
Cheng et al., "Gentest: An Automatic Test-Generation System for Sequential Circuits", Computer, vol. 22 No. 4, Apr. 1989, pp. 43-49.
Bencivenga et al., "The Architecture of the GentTest Sequential Test Generator", IEEE 1991 Custom IC Conference, May 1991, pp. 17.1/1-4.

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