Fishing – trapping – and vermin destroying
Patent
1994-07-18
1995-07-11
Fourson, George
Fishing, trapping, and vermin destroying
437 77, 437203, 437229, 437912, 437944, H01L 2128, H01L 21335
Patent
active
054321255
ABSTRACT:
In a method of manufacturing a semiconductor apparatus, a resist is coated on a semiconductor substrate and baked. The resist is exposed with an electron beam, and an invertedly tapered opening is formed. Recess etching is performed on the semiconductor substrate through the opening. An electrode is formed at a location determined by the recess etching.
REFERENCES:
patent: 5122387 (1992-06-01), Takenaka et al.
patent: 5190892 (1993-03-01), Sano
Wolf, S and R. Tauber "Silicon Processing for the VLSI ERA", Lattice Press, Sunset Beach, Calif., 1986, p. 518.
Misawa Hiroto
Tsuji Hitoshi
Fourson George
Kabushiki Kaisha Toshiba
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