Syndrome sequential decoder

Details Syndrome sequential decoder Syndrome sequential decoder

1989-03-08

1991-03-05

Atkinson, Charles E.

Excavating

G06F 1110

Patent

active

049982532

ABSTRACT:
A syndrome sequential decoding system for error correction of a convolutional code has a syndrome former for providing a syndrome sequence from a received sequence, a syndrome buffer memory for storing the syndrome sequence, an estimated error buffer memory for storing an estimated error sequence, a syndrome register for representing a syndrome state under searching, a comparator for testing if content of the syndrome register is all zero, and an algorithm controller. The algorithm controller controls the syndrome register, calculates a path metric and raises a flag in the estimated error buffer memory for showing an estimated error bit position. The syndrome sequential decoding system also includes an exclusive-OR circuit for correcting an information bit error according to the output of the estimated error buffer memory. When the content of the syndrome register is all zero, it shows that a currently searching path merges with the maximum likelihood path. Then a decoded sequence up to this point is explicitly determined. Moreover no further search will be required as long as the following syndromes remain zero. When the content of the syndrome register becomes nonzero, the normal path search restarts at this point. A back search limit pointer is provided on the estimated error buffer memory and a syndrome buffer memory to show the limit of the depth of back search.

REFERENCES:
patent: 4669084 (1987-05-01), Hartman et al.
patent: 4797887 (1989-01-01), Yamasaki et al.
patent: 4853930 (1989-08-01), Shimada
patent: 4878221 (1989-10-01), Shimada
patent: 4905317 (1990-02-01), Suzuki et al.
Convolutional Codes I: Algebraic Structure, Forney, Jr., IEEE Transactions on Information Theory vol. IT-16, No. 6, Nov. 1970, pp. 720-738.
Channel Coding with Multilevel/Phase Signals, Ungerboeck, IEEE Transactions on Information Theory, vol. IT-28, No. 1, Jan. 1082, pp. 55-67.
Development of a Variable Rate Syndrome Sequential Decoder Based on a Stack Algorithm, Ohashi et al., IEEE, 1988, pp. 131-135.
IEEE Catalog No. 88 CH 2621, Abstracts of Papers, Jun. 1988.

Affiliated with

Also associated with

Rating

Syndrome sequential decoder does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Syndrome sequential decoder, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Syndrome sequential decoder will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-501934