Single-level multiplexer

Details Single-level multiplexer Single-level multiplexer

1988-03-22

1990-06-05

Griffin, Robert L.

Multiplex communications

Wide area network

Packet switching

307243, 328104, H04J 304, H03K 1756, H03K 1740, H03K 1752

Patent

active

049320270

ABSTRACT:
A single-level multiplexer (70) has a plurality of stages (72-78), one for each bit. In each stage, a select transistor (84) has a current path coupling an output node (86) to a common node (88), and a control element that is coupled to a select signal line (80). A data transistor (90) has a current path connecting a voltage supply (92) to the common node (88), and a control element connected to a data signal source (82). Common node (88) is connected to a current source (94, 96, 98, 100). The output node (86) of each stage is coupled together with the output nodes of the other states to an output (108) of the multiplexer.

REFERENCES:
patent: 3638131 (1972-01-01), Sarkissian
patent: 3783307 (1974-01-01), Breuer
patent: 4349750 (1982-09-01), Geurts
patent: 4415815 (1983-11-01), Dijkmans et al.
patent: 4572967 (1986-02-01), Metz

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