Patent
1975-11-26
1977-12-13
Wojciechowicz, Edward J.
357 48, 357 49, 357 55, 357 60, H01L 2704, H01L 2712, H01L 2906, H01L 2904
Patent
active
040632725
ABSTRACT:
Disclosed is a semiconductor device and a method for the manufacture thereof. A semiconductor wafer with three stacked regions is provided. An inner region exhibits one conductivity type and the two outer regions exhibit the opposite conductivity type. Isolation regions of the opposite conductivity type are formed by the temperature gradient zone melting process to separate the wafer into a plurality of device regions. Peripheral grooves are cut in one major surface in each device region. The grooves extend into the interior region thus electrically isolating the portion of the major surface within the grooves from the other major surface. The grooves are filled with a passivation material.
REFERENCES:
patent: 3908187 (1975-09-01), Sheldon et al.
patent: 3911471 (1975-10-01), Kooi et al.
patent: 3982269 (1976-09-01), Torreno et al.
Boah John K.
Kennedy Richard W.
General Electric Company
Mooney R. J.
Salai S. B.
Wojciechowicz Edward J.
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