Copper alloy metallurgies for VLSI interconnection structures

Details Copper alloy metallurgies for VLSI interconnection structures Copper alloy metallurgies for VLSI interconnection structures

1992-01-08

1993-09-07

LaRoche, Eugene R.

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified configuration

257741, 257762, H01L 2348, H01L 2954

Patent

active

052432220

ABSTRACT:
A method for providing vias, lines and other recesses in VLSI interconnection structures with copper alloys to create a thin layer of an oxide of an alloying element on the surface of the deposited alloy and on portions of the alloy which are in contact with an oxygen containing dielectric is disclosed. The present invention is also directed to VLSI interconnection structures which utilize this copper alloy and thin oxide layer in their vias, lines and other recesses. The oxide layer eliminates the need for diffusion barrier and/or adhesion layers and provides corrosion resistance for the deposited copper alloy. VLSI devices utilizing this copper alloy in the vias, lines and other recesses interconnecting semiconductor regions, devices and conductive layers on the VLSI device are significantly improved.

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