Method for manufacturing semiconductor device having a multilaye

Details Method for manufacturing semiconductor device having a multilaye Method for manufacturing semiconductor device having a multilaye

1992-06-08

1993-09-07

Quach, T. N.

Fishing, trapping, and vermin destroying

437195, 437183, 437230, 437246, 427 98, H01L 21445

Patent

active

052428613

ABSTRACT:
In a process for manufacturing a semiconductor device having a multi-layer wiring structure, a silicon oxide film is deposited on the surface of second level wiring conductors formed on a power supply layer for electroplating, and then, the deposited silicon oxide film is etched back so that the silicon oxide film remains only on the side surfaces of the second level wiring conductors. Thereafter, the power supply layer is removed by the sputter etching, and the silicon oxide film is removed together with the metal deposit adhered to the surface of the silicon oxide film at the time of the sputter etching. Accordingly, the short-circuiting of adjacent second level wiring conductors which would be caused because of peeling-off of the metal deposit is prevented.

REFERENCES:
patent: 3993515 (1976-11-01), Reichert
patent: 3997963 (1976-12-01), Riseman
patent: 5098860 (1992-03-01), Chakravorty et al.
patent: 5130275 (1992-07-01), Dion

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