Multiplex communications – Wide area network – Packet switching
Patent
1981-03-02
1983-08-02
Olms, Douglas W.
Multiplex communications
Wide area network
Packet switching
340347DD, H04J 307
Patent
active
043970176
ABSTRACT:
It has now been confirmed as regards a stuff (justification) synchronization device for each of plesiochronous input pulse sequence to be time division multiplexed that a low frequency jitter component appears in a synchronous output pulse sequence from the effect of sampling phase lags of read pulse sequences for reading the output pulse sequence for stuffing from an elastic memory (36) of the device relative to write pulse sequences for storing the input pulse sequence in the memory at a sampling interval equal to the memory capacity. The jitter is reduced (1) by selecting a prime number, preferably thirteen and more preferably seventeen or nineteen, as the memory capacity, (2) by cyclically using selected write and read pulse sequences for phase lag monitoring, or (3) by rendering the sampling interval either random or equivalently random.
REFERENCES:
patent: 3985963 (1976-10-01), Boutmy et al.
patent: 3987248 (1976-10-01), Platet et al.
patent: 4079371 (1978-03-01), Shimamura
patent: 4132862 (1979-01-01), Ferret et al.
patent: 4196315 (1980-04-01), Boutmy et al.
Nippon Electric Co. Ltd.
Olms Douglas W.
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