Semiconductor device having an inter-layer insulating film dispo

Details Semiconductor device having an inter-layer insulating film dispo Semiconductor device having an inter-layer insulating film dispo

1988-06-07

1991-12-24

James, Andrew J.

357 236, 357 231, 357 235, 357 59, 357 68, H01L 2978, H01L 2968

Patent

active

050757628

ABSTRACT:
A MOS semiconductor device and method for manufacturing the device includes a semiconductor substrate, a first insulating film formed on the substrate, and a first wiring layer which is formed on, and to lesser width than, the first insulating film. A second insulating film is formed on the first wiring layer. A side wall insulating film is formed on side walls of the first wiring layer and of the second insulating film. The sidewall insulating film is formed in such a manner as to have progressively larger width as the side wall insulating film comes closer to the semiconductor substrate. A second wiring layer is formed in such a manner as to extend from above the first wiring layer, which it is spaced by the second insulating film, to an exposed surface of the semiconductor substrate. The latter exposed surface is situated in proximity to, but laterally spaced from, the first wiring layer. The second insulating film and the side wall insulating film serve as an interlayer insulating film.

REFERENCES:
patent: 4654680 (1987-03-01), Yamazaki
patent: 4663645 (1987-05-01), Komori et al.
patent: 4807002 (1989-02-01), Donzelli
patent: 4808544 (1989-02-01), Matsui
patent: 4823172 (1989-04-01), Mihara
patent: 4845544 (1989-07-01), Shimizu
patent: 4855801 (1989-08-01), Kuesters
"An 80ns 1Mb ROM"by Fujio Masuoka, et al., 1984 IEEE International Solid-State Circuits Conference, pp. 146, 147 and 329.
"4M Bit Mask ROM And The Application Therefore", by Shoichi-Tsujita Electronic Parts and Materials, published 1/1/86, pp. 104-108.

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