Excavating
Patent
1994-05-05
1995-09-05
Beausoliel, Jr., Robert W.
Excavating
371 48, 39518218, G06F 1100
Patent
active
054487250
ABSTRACT:
Error detection and fault isolation mechanisms generally require separate capture latches to capture every occurrence of an error (for example from a parity checker or timeout counter) and an associated mask latch to temporarily or permanently block further detection of the same error. In the claimed invention, the mask latch is replaced by a single error control mechanism which is able to set and reset the error capture latches. The detected error is held in the capture latch, thus preventing further error capture, until a signal from the single error control mechanism resets the latch.
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IBM Technical Disclosure Bulletin, vol. 30, No. 1, Jun. 1987, Titled "Primary Error Detection System for I/O Apparatus".
Beausoliel, Jr. Robert W.
Cutter Lawrence D.
International Business Machines - Corporation
Snyder Glenn
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