Boundary scan architecture extension

Details Boundary scan architecture extension Boundary scan architecture extension

1992-10-29

1995-09-05

Voeltz, Emanuel T.

Excavating

371 151, 371 251, H04B 1700

Patent

active

054485762

ABSTRACT:
A method and apparatus provides improved modes of operation of a standard test bus based on a standard boundary scan architecture which minimizes the number of bits required to be serially scanned into the controllers of the various devices connected to the bus by temporarily disabling scan paths not required to be utilized. Means for continuously verifying the inoperative state of test logic and for diagnosing test logic faults are also described.

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