Simple automated discretionary bonding of multiple parallel elem

Details Simple automated discretionary bonding of multiple parallel elem Simple automated discretionary bonding of multiple parallel elem

1988-04-08

1989-03-21

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437051, 437053, 437059, 29847, 29853, 427098, 2281801, 228038, H01L 2712

Patent

active

048142832

ABSTRACT:
A method for the discretionary interconnection of plural devices into an array includes the steps of designing bridge sites between the devices, individually testing the devices, inking over the bridge sites to devices which do not meet predetermined parameters, and soldering in a manner to cause the solder to bridge the gap between the acceptable devices and the rest of the array but not to bridge the gap to unacceptable devices. In devices comprised of multiple parallel elements, only sub-elements which fall within predetermined functional requirement ranges are incorporated into the parallel array produced. This method of discretionary interconnection is readily adapted to automated techniques for fabricating semiconductor MOS devices such as MCTs, IGBTs and parallel MOSFET arrays.

REFERENCES:
patent: 3702025 (1972-11-01), Archer
patent: 4075708 (1978-02-01), Chen
patent: 4104785 (1978-08-01), Shiba et al.
patent: 4281398 (1981-07-01), McKenny et al.
patent: 4549200 (1985-10-01), Ecker et al.
Canning et al., "Active Memory Calls for Discretion", Electronics, Feb. 20, 1967, pp. 143-154.
Harper, editor, Handbook of Materials and Processes for Electronics, McGraw-Hill, 1984, pp. 12-73-12-74.
Yerman et al., SN 947,151 filed 12/29/86.

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