Method for manufacturing a monocrystalline semiconductor device

Metal treatment – Compositions – Heat treating

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29576T, 148DIG164, 156617R, H01L 21263

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046611673

ABSTRACT:
A method for manufacturing a semiconductor device, which comprises: a first process for producing a semiconductor layer of polycrystalline silicon or amorphous silicon on the surface of a substrate of insulator or a substrate made up by forming an insulating layer on a basic semiconductor; a second process for producing an island of semiconductor layer surrounded by dielectric materials from the semiconductor layer; a third process for producing a film of Si.sub.3 N.sub.4 on the island of semiconductor layer, or on a film of SiO.sub.2 formed on the island; a fourth process for removing the film of Si.sub.3 N.sub.4 at a predetermined region on the island; and a fifth process for irradiating with scanning an energy beam to the island of semiconductor layer so as to melt and recrystallize the island, thereby monocrystallizing or increasing the size of crystal grains at at least a partial region thereof.

REFERENCES:
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patent: 4559102 (1985-12-01), Hayafuji
patent: 4575925 (1986-03-01), Kanbara et al.
patent: 4584025 (1986-04-01), Takaoka et al.
patent: 4592799 (1986-06-01), Hayajuji
Mukai, R. et al, "Indirect Laser Annealing of Polysilicon for Three-Dimensional IC's", in IEEE International Electron Devices Meeting, Washington, D.C., Dec. 5-6-7, 1983, pp. 360-363.
Douglas, J. H., "The Route to 3-D Chips", in High Technology, Sep. 1983, pp. 55-59.
Akiyama, S. et al, "Multilayer CMOS Device Fabricated on Laser Recrystallized Silicon Islands", in IEEE International Electron Devices Meeting, Wash. D.C., 12/5-7/83, pp. 352-355.
J. P. Colinge et al, "Use of Selective Annealing for Growing Very Large Grain Silicon on Insulator Films", in Appl. Phys. Lett., 41(4), 15 Aug. 1982.

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