MNOS memory device

Metal treatment – Process of modifying or maintaining internal physical... – Chemical-heat removing or burning of metal

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148 15, 357 23, 29571, H01L 2126

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active

041982525

ABSTRACT:
An MNOS device is described wherein a body of semiconductor material is provided with source and drain regions and an interstitial portion, representing the channel region, therebetween. The channel region has an area, precisely aligned with the gate, that has been implanted with additional conductivity modifiers of the same conductivity type as the remaining portions of the channel region.

REFERENCES:
patent: 3653978 (1972-04-01), Robinson
patent: 3719866 (1973-03-01), Naber et al.
patent: 4011576 (1977-03-01), Uchida et al.
patent: 4101921 (1978-07-01), Shimada et al.
Lundkvist et al., Solid-State Electronics, "Discharge of MNOS Structures", vol. 16, 1973, Pergamon Press, Gt. Britain, pp. 811-823.
Cricchi et al., International Electronic Device Meeting, "The Drain-Source Protected MNOS Memory Device and Memory Endurance", 1973, pp. 126-128.
Lundstrom et al., IEEE Transactions on Electron Devices, vol. ED-19, No. 6, Jun. 1972, pp. 826-836.

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