Fishing – trapping – and vermin destroying
Patent
1988-12-06
1990-03-06
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437186, 437193, 437 20, 437 27, 437 41, 437 46, 437191, 148DIG20, H01L 2100, H01L 2102, H01L 2128, H01L 21265
Patent
active
049065912
ABSTRACT:
In a method of manufacturing a semiconductor device having an electric contact, semiconductor regions (9) as a source or drain region of a MOS transistor, having a conductivity type opposite to that of a semiconductor substrate (1) are formed selectively on the substrate. An insulating layer (10) is formed on the substrate (1) to expose only a surface of each semiconductor region (9). Impurity ions of the conductivity type opposite to that of the substrate (1) are implanted into the exposed surface of each region (9). After that, a polycrystal silicon layer (13) is formed on the surface of each region (9) implanted with the impurity ions and on the insulating layer (10). Further, impurity ions of the conductivity type opposite to that of the substrate (1) are further implanted into the polycrystal silicon layer (13). The condition of implanting the impurity ions into the polycrystal silicon layer (13) is set by controlling implantation energy to enable the maximum point of concentration distribution of the impurity ions in a direction perpendicular to the surface of the substrate (1) to be distant from a position of the interface between the polycrystal silicon layer (13) and the substrate (1) by a dimension corresponding to a standard deviation of the concentration distribution of the impurity ions toward the polycrystal silicon layer (13).
REFERENCES:
patent: 4502206 (1985-03-01), Schnable et al.
Tsuchimoto, J., Ion Implant. of Impurities in Polycryst. Silicon, Ion Implant. in Semicond., Ed. S. Namba, Plenum Press, 1974, pp. 605-612.
Wolf, S., Ion Implant. for VLSI, Chap. 9, Silicon Processing for the VLSI Era, vol. 1, Lattice Press, 1986, pp. 303-305.
Everhart B.
Hearn Brian E.
Mitsubishi Denki & Kabushiki Kaisha
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