High voltage planar edge termination using a punch-through retar

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357 52, 357 53, 357 30, 357 59, H01L 2990

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active

050757393

ABSTRACT:
A high voltage semiconductor structure having multiple guard rings is provided, wherein an enhancement region, which is of an opposite conductivity type from the guard rings, is formed between the guard rings to increase punch-through voltage between the guard rings. A floating field plate ring is formed over each guard ring, capacitively coupled to each guard ring. Each floating field plate has a flap extending beyond the guard ring in the direction of a main PN junction. The floating field plates serve to reduce parasitic coupling between adjacent guard rings.

REFERENCES:
patent: 4573066 (1986-02-01), Whight
patent: 4707719 (1987-11-01), Whight
patent: 4857982 (1989-08-01), Forrest
patent: 5017976 (1991-05-01), Sugita

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