Method and apparatus for diagnosis of logical circuits

Details Method and apparatus for diagnosis of logical circuits Method and apparatus for diagnosis of logical circuits

1987-01-05

1988-11-08

Atkinson, Charles E.

Excavating

371 28, G01R 3128

Patent

active

047837853

ABSTRACT:
In a method and apparatus for diagnosis of a logical circuit including a combinational logical circuit or a semiconductor memory and having its input and output terminals respectively connected to input and output latches which are operated by the same clock pulse contained in a single-phase clock signal, diagnostic data is transferred to the diagnosed circuit through the input latches by the rise of one clock pulse in the clock signal, an output signal delivered out of the diagnosed circuit is latched into the output latch by the fall of the one clock pulse, and the latched data is compared with expected data to diagnose the logical circuit. Use of a clock signal containing clock pulses of a relatively large width can be permitted for diagnosing the logical circuit which is operating at a high operation speed.

REFERENCES:
patent: 3541441 (1970-11-01), Hrustich
patent: 3633174 (1972-01-01), Griffin
patent: 4093851 (1978-06-01), Paulinski
patent: 4430735 (1984-02-01), Catiller
patent: 4564943 (1986-01-01), Collins et al.
patent: 4692633 (1987-09-01), Ngai et al.

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