Large scale integrated circuit

Details Large scale integrated circuit Large scale integrated circuit

1988-10-04

1990-08-14

James, Andrew J.

357 40, 357 45, 357 71, H01L 2348

Patent

active

049491571

ABSTRACT:
This invention relates to an LSI in which a gate electrode wiring in a logic cell which is constructed by combining a plurality of basic cells each of which consisting of a pair of p-type and n-type MOS transistors and a gate electrode wiring, has portion extending substantially to a marginal region which does not contain logic cells. Additionally wiring portions associated with the LSI are disposed in a layer different from the layer to which the extended portions of the gate electrode wiring belongs. The extended portions, in the marginal region, are connectible portions through through holes. Such a structural arrangement results in an increase in the gate utilization ratio and improves the reliability of an LSI without decreasing the freedom to lead the wiring between gates.

REFERENCES:
patent: 4746965 (1988-05-01), Nishi
patent: 4816887 (1989-03-01), Sato
patent: 4825276 (1989-04-01), Kobayashi
Nikkei Microdevices, pp. 111-126, Jul. 1986, by Nikkei McGraw-Hill Co.

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