Insulated dual gate field effect transistor

Details Insulated dual gate field effect transistor Insulated dual gate field effect transistor

1986-06-09

1987-12-29

James, Andrew J.

357 234, 357 41, H01L 2978

Patent

active

047164468

ABSTRACT:
A semiconductor device comprising a field effect transistor of the lateral or vertical DMOST type having a source zone of the one conductivity type, an adjoining channel region of the other conductivity type, a drain zone of the one conductivity type and a weakly doped drift region located between the drain zone and the channel region. According to the invention a second gate electrode located on the side of the drain zone and separated from the first gate electrode is disposed on the insulating layer above the channel zone behind the first gate electrode located on the side of the source zone. The length L.sub.2 of the part of the second gate electrode located above the channel zone is at least equal to that of the part of the first gate electrode located above the channel zone. As a result, a high value of the mutual conductance g.sub.m as well as good linearity can be obtained. The second gate electrode is preferably made of polycrystalline silicon,which in the operating condition is depleted at least in part above the drift region.

REFERENCES:
patent: 3450960 (1969-06-01), Chang
patent: 3926694 (1975-12-01), Cauge
patent: 4189737 (1980-02-01), Schrader
patent: 4306352 (1981-12-01), Schrader
The Electronic Engineer, Sep. 1967, pp. 36-39, by Dawson.
IBM Technical Disclosure Bulletin, vol. 19, #7, Dec. 1976, p. 2787.
IBM Tech. Disc. Bulletin, vol. 21, #8, Jan. 1979, p. 3368, by Larson et al.

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