Folded linear systolic array

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364730, G06F 1532

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active

049723618

ABSTRACT:
Circuit for computing values of the elements of a triangular matrix, where ##EQU1## similar subcircuits provide CORDIC processing and memory, the subcircuits connected in a folded systolic array, the first subcircuit providing input capability to the array for receiving complex data containing N words, and the output of the last subcircuit coupled to its own input. The circuit may be used to process observation vector data taken from an antenna system of N elements to provide an output useful in determining weights for nulling out the observation data from a larger signal.

REFERENCES:
patent: 4231102 (1980-10-01), Barret et al.
patent: 4601006 (1986-07-01), Riu
patent: 4727503 (1988-02-01), McWhirter
Curtis et al., "A Cordic Processor for Laser Trimming" IEEE Micro vol. 6, #3 , pp. 61-71, Jun. 1986.
VLSI and Modern Signal Processing, by S. Y. Kung, H. J. Whitehouse, T. Kalaith, eds., (c) 1985, Prentice Hall.
Systolic Array Processor Brassboard Descriptive Summary, by R. J. Lackey, Hazeltine Corp., Dec. 1987.
A Pipelined Array for Linearly Constrained Least-Squares Optimisation, by T. J. Shepherd, J. G. McWhirter, Proc. IMA, Int. Conf. on Mathematics in Signal Processing, Bath, 1985, Revised, 1986.

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