1989-03-03
1990-11-20
Wojciechowicz, Edward J.
357 2313, 357 55, 357 68, H01L 2978
Patent
active
049722409
ABSTRACT:
A vertical power MOS transistor, in which a gate oxide film is formed over partial areas of a semiconductor substrate having a first conductivity type, which functions as a drain, a channel region having a second conductivity type formed in the substrate, and a source region having the first conductivity type, formed in the channel region, and a gate electrode is formed on the gate oxide film, in which an insulating film covers the gate electrode, and a source electrode is formed on the insulating film, and in which an ohmic contact electrode is formed on portions of a source region an a channel region, and a coupling member connects the ohmic contact electrode with the source electrode to separate the source electrode from the gate electrode edge portion.
REFERENCES:
patent: 4769685 (1988-09-01), MacIver et al.
patent: 4837606 (1989-06-01), Goodman et al.
Adolph Blicher, "MOS Power Transistor Design", Field-Effect and Bipolar Power Transistor Physics, Academic Press, 1981, pp. 280-283.
Hirota Yukitsugu
Mihara Teruyoshi
Murakami Koichi
Nissan Motor Company Limited
Wojciechowicz Edward J.
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