Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
Patent
1988-06-03
1990-11-20
Miller, Stanley D.
Electrical transmission or interconnection systems
Nonlinear reactor systems
Parametrons
307443, 307475, H03K 1716, H03K 19003
Patent
active
049721046
ABSTRACT:
An anti-simultaneous conduction transistor is incorporated into the standard TTL circuit totem pole to reduce simultaneous conduction of the pullup and pulldown transistor elements of the totem pole. The collector of the active discharge anti-simultaneous conduction transistor element (Q5) is operatively coupled to a base of the pullup transistor element (Q2,Q3) through a diode (D5), the emitter is coupled to low potential, and the base is coupled to the base of the pulldown transistor element (Q4) through ballast resistance (R6,R7). The anti-simultaneous conduction transistor element (Q5) mirrors the conducting state of the pulldown transistor element (Q4) without current hogging substantially diverting or discharging base current from the base of the pullup transistor element (Q2,Q3) whenever the pulldown transistor element (Q4) is conducting. Undesirable current spikes in the sourcing current are avoided by preventing simultaneous conduction in the totem pole.
REFERENCES:
Digital Logic Handbook 1973-1974 by Digital Equipment Corporation, pp. 148-149.
IBM Tech. Disc. Bul., "Array Word/Bit Line Driver Circuit", vol. 25, No. 10, Mar., 1983.
Fairchild Semiconductor Corporation
Kane Daniel H.
Miller Stanley D.
Patch Lee
Wambach Margaret R.
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