Method of fabricating semiconductor device

Fishing – trapping – and vermin destroying

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437 41, 437 29, 437 30, 437233, 357 233, 148DIG106, H01L 21265

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active

049719220

ABSTRACT:
A method of fabricating a MOS field effect semiconductor device having an LLD structure is described in which an insulating film is formed on a gate electrode and a layer of polycrystalline silicon, oxide, high melting point metal or a silicide of a high melting point metal is formed on a wafer and etched away by anisotropic RIE, except a portion thereof on a sidewall of the gate. With the resulting structure, degradation of the transconductance of the device due to injection of hot carriers is prevented. Also, the size of the device can be minimized without unduly increasing the resistances of the drain/source region, the gate electrode, and the contacts of the device.

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Miyamoto et al., "A 1.0 .mu.m N-Well CMOS/Bipolar Technology For VLSI Circuits", IEDM '83, pp. 63-66.
Tsang et al., "Fabrication of High-Performance LDDFETs With Oxide Sidewall-Spacer Technology", IEEE Trans. on Electron Devices, vol. ED-29, No. 4, Apr. 1982, pp. 590-596.
Bassous et al., "Self-Aligned Polysilicon Gate MOSFETs With Tailored Source and Drain Profiles", IBMTDB, vol. 22, No. 11, Apr. 1920, pp. 5146-5147.

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