Structure and method for detecting occurrence of external events

Details Structure and method for detecting occurrence of external events Structure and method for detecting occurrence of external events

1997-07-28

1998-08-25

Harvey, Jack B.

395800, 395825, 395726, G06F 1516

Patent

active

057991952

ABSTRACT:
In a cached computer environment, an additional mechanism for communicating to a processor the occurrence of an external hardware event is provided through semaphores in the main memory. In one embodiment, the processor is provided a set of semaphore registers for storing semaphore addresses allocated in the memory. When an external device modifies a semaphore in the main memory, the cache snooping mechanism which ensures cache coherency snoops the caches to see if other copies of the modified semaphore exist in any of the caches. When the processor checks for a semaphore address in the internal cache, the processor also compares the semaphore address with the addresses contained in the semaphore registers. Upon detection of a modified semaphore in one of the semaphore registers, the processor executes a reserved interrupt service routine which invokes a pre-registered call-back procedure in the peripheral's device driver to service the event.

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