Patent
1985-05-24
1987-06-30
Edlow, Martin H.
357 15, 357 55, H01L 2980
Patent
active
046774513
ABSTRACT:
A semiconductor device component, and process for preparation thereof, wherein current flowing in a vertical channel of semiconductor material is controlled by metallic gates laterally disposed on either side of the channel. Insulator layers are positioned overlying and underlying each gate, to reduce parasitic capacitance which would otherwise be present if the metallic gate material were in contact with overlying and underlying semiconductor material. Reduction of the capacitance allows the use of wider gate strips, thereby reducing the series resistance to an external gate contact. These changes significantly improve the high-power, high-frequency performance of the device component, as compared with permeable base transistors.
REFERENCES:
patent: 4378629 (1983-04-01), Bozlee et al.
patent: 4566172 (1986-01-01), Bencuya et al.
Parsons James D.
Snyder David E.
Denson-Low Wanda
Edlow Martin H.
Gudmestad Terje
Hughes Aircraft Company
Karambelas A. W.
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