Shared buffer memory switch for an ATM switching system and its

Details Shared buffer memory switch for an ATM switching system and its Shared buffer memory switch for an ATM switching system and its

1995-05-24

1997-03-11

Chin, Wellington

Multiplex communications

Pathfinding or routing

Switching a message which includes an address header

370413, 370535, H04L 1256, H04L 1250

Patent

active

056109148

ABSTRACT:
A shared buffer memory switch for an ATM switching system and its broadcasting control method are provided which can guarantee the cell transfer quality defined for each connection by maintaining the sequence order of arrival for each cell even if ordinary and broadcasting cells are mixed. When an input cell is a broadcasting cell, bit map data showing a broadcasting destination information is read from a broadcast registration table 6 based on the routing information derived from a header information of the cell, and an address for storing the cell in the shared buffer memory 3 is written in all the address pointer queues of FIFOs 9- corresponding to all output ports shown in the broadcasting destination information, and the cell is stored in the shared buffer memory 3 with the broadcasting destination information. In reading a cell, an address of the shared buffer memory from which the cell is to be read out is read from the address pointer queue of FIFO 9-, and the cell is output to the corresponding output port. In the case where the cell is a broadcasting cell, the broadcasting destination information attached to the cell is reset for the corresponding output port and the revised broadcasting destination information and the cell is stored in the same address of the shared buffer memory until all broadcasting destination information are reset.

REFERENCES:
patent: 4947388 (1990-08-01), Kuwahara et al.
patent: 5280475 (1994-01-01), Yanagi et al.
patent: 5394397 (1995-02-01), Yanagi et al.
patent: 5410540 (1995-04-01), Aiki et al.
"Large-Scale ATM Multistage Switching Network with Shared Buffer Memory Switches," Y. Sakurai, N. Ido, S.Gohara, and N.Endo, IEEE Communications Magazine, pp. 90-96, Jan. 1991.
"A Shared Buffer Memory Switch for an ATM Exchange," N. Endo, H. Kuwahara, M. Ogino, and T. Kozaki, IEEE Communications, Int'l Conference, pp. 4.4.1-4.4.5, 1989.

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