Test method and apparatus for cellular array processor chip

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371 15, G01R 3128

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047333936

ABSTRACT:
A cellular array processor chip includes a common bus communicating with the individual cells thereof. The common bus can be monitored during chip testing to detect the presence, or absence, of a defective cell. Each cell can be inactivated with respect to the common bus. During testing if the presence of a defective cell is determined to exist each cell is individually tested until a defective cell is located. That cell is inactivated and the chip testing is resumed until all defective cells are located and inactivated.

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patent: 4460999 (1984-07-01), Schmidt
patent: 4532628 (1985-07-01), Matthews
patent: 4541090 (1985-09-01), Shiragasawa
patent: 4586178 (1986-04-01), Bosse
patent: 4615030 (1986-09-01), Kumagai

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