Instruction processor for processing branch instruction at high

Details Instruction processor for processing branch instruction at high Instruction processor for processing branch instruction at high

1989-03-21

1990-09-04

Williams, Jr., Archie E.

Boots, shoes, and leggings

3642318, 364258, 3642581, 364259, 3642613, 3642619, 364252, 3642522, G06F 930, G06F 932, G06F 938, G06F 942

Patent

active

049549472

ABSTRACT:
An instruction processor effecting operations for register operands and for processing branch instructions to perform address calculations for branch destination instructions, comprising general-purpose registers storing data including results of operations of said instruction processor, address adders calculating the address of branch destination instructions by using data read out from the general-purpose register and an ALU performing arithmetical or logical operations on the data read out from the general-purpose register in the decode cycle of the instructions. The result of the arithmetical or logical operation is inputted into the address adder but not from the general-purpose register, in the case where the result of the arithmetical or logical operation is utilized for address calculation in the execution of a succeeding instruction.

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